//------------------------------------------------------------------------------
// The confidential and proprietary information contained in this file may
// only be used by a person authorised under and to the extent permitted
// by a subsisting licensing agreement from ARM Limited.
//
//            (C) COPYRIGHT 2008-2012 ARM Limited.
//                ALL RIGHTS RESERVED
//
// This entire notice must be reproduced on all copies of this file
// and copies of this file may only be made by a person if such person is
// permitted to do so under the terms of a subsisting license agreement
// from ARM Limited.
//------------------------------------------------------------------------------
// Version and Release Control Information:
//
// File Revision       : 129471
// File Date           :  2012-05-03 18:01:17 +0100 (Thu, 03 May 2012)
// Release Information : PL401-r0p1-00eac0
//------------------------------------------------------------------------------
// Purpose             : This block takes incoming address and determines the
//                       destination for the transaction according to remap
//                       bits.
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
// Module Declaration
//------------------------------------------------------------------------------

module nic400_asib_cpu_mst_axi4_decode_ysyx_rv32
  (
    addr_s,
    security8,
    security1,
    security5,
    security6,
    security7,
    security0,
    security3,
    security2,
    aprot,
    acache_in,
    acache_out,
    avalid_int,
    aregion_out
  );


  // ---------------------------------------------------------------------------
  //  Port definitions
  // ---------------------------------------------------------------------------

  input  [31:0]    addr_s;          // address field
  input  [15:0]    security8;
  input            security1;
  input  [15:0]    security5;
  input  [15:0]    security6;
  input  [15:0]    security7;
  input            security0;
  input            security3;
  input            security2;
  input            aprot;
  input  [3:0]     acache_in;
  output [3:0]     acache_out;
  output [8:0]     avalid_int;
  output [3:0]     aregion_out;


  //------------------------------------------------------------------------
  // Wires
  //------------------------------------------------------------------------



  wire [7:0]       avalid_dec;
  wire [32:0]      decode_int;
  wire [32:0]      remap_decode;
  wire [3:0]       region_int;

  //------------------------------------------------------------------------
  // Registered values
  //------------------------------------------------------------------------


  // ---------------------------------------------------------------------------
  // Start of code
  // ---------------------------------------------------------------------------



  // ---------------------------------------------------------------------------
  // address decode

  assign decode_int[0] = (32'h1FF0000 <= addr_s) && (addr_s <= 32'h1FFFFFF);

  assign decode_int[1] = (32'h2010000 <= addr_s) && (addr_s <= 32'hEFFFFFF);

  assign decode_int[2] = (32'hF000000 <= addr_s) && (addr_s <= 32'hF0FFFFF);

  assign decode_int[3] = (32'h10000000 <= addr_s) && (addr_s <= 32'h10000FFF);

  assign decode_int[4] = (32'h10001000 <= addr_s) && (addr_s <= 32'h10001FFF);

  assign decode_int[5] = (32'h10002000 <= addr_s) && (addr_s <= 32'h10002FFF);

  assign decode_int[6] = (32'h10003000 <= addr_s) && (addr_s <= 32'h10003FFF);

  assign decode_int[7] = (32'h10004000 <= addr_s) && (addr_s <= 32'h10004FFF);

  assign decode_int[8] = (32'h10005000 <= addr_s) && (addr_s <= 32'h10005FFF);

  assign decode_int[9] = (32'h10006000 <= addr_s) && (addr_s <= 32'h10006FFF);

  assign decode_int[10] = (32'h10007000 <= addr_s) && (addr_s <= 32'h10007FFF);

  assign decode_int[11] = (32'h10008000 <= addr_s) && (addr_s <= 32'h10008FFF);

  assign decode_int[12] = (32'h10009000 <= addr_s) && (addr_s <= 32'h10009FFF);

  assign decode_int[13] = (32'h1000A000 <= addr_s) && (addr_s <= 32'h1000AFFF);

  assign decode_int[14] = (32'h1000B000 <= addr_s) && (addr_s <= 32'h1000BFFF);

  assign decode_int[15] = (32'h1000C000 <= addr_s) && (addr_s <= 32'h1000CFFF);

  assign decode_int[16] = (32'h1000D000 <= addr_s) && (addr_s <= 32'h1000DFFF);

  assign decode_int[17] = (32'h1000E000 <= addr_s) && (addr_s <= 32'h1000EFFF);

  assign decode_int[18] = (32'h1000F000 <= addr_s) && (addr_s <= 32'h1000FFFF);

  assign decode_int[19] = (32'h10010000 <= addr_s) && (addr_s <= 32'h10010FFF);

  assign decode_int[20] = (32'h10011000 <= addr_s) && (addr_s <= 32'h10011FFF);

  assign decode_int[21] = (32'h10012000 <= addr_s) && (addr_s <= 32'h10012FFF);

  assign decode_int[22] = (32'h10013000 <= addr_s) && (addr_s <= 32'h10013FFF);

  assign decode_int[23] = (32'h10014000 <= addr_s) && (addr_s <= 32'h10014FFF);

  assign decode_int[24] = (32'h10015000 <= addr_s) && (addr_s <= 32'h10015FFF);

  assign decode_int[25] = (32'h10016000 <= addr_s) && (addr_s <= 32'h10016FFF);

  assign decode_int[26] = (32'h10017000 <= addr_s) && (addr_s <= 32'h10017FFF);

  assign decode_int[27] = (32'h10018000 <= addr_s) && (addr_s <= 32'h10018FFF);

  assign decode_int[28] = (32'h30000000 <= addr_s) && (addr_s <= 32'h3FFFFFFF);

  assign decode_int[29] = (32'h40000000 <= addr_s) && (addr_s <= 32'h7FFFFFFF);

  assign decode_int[30] = (32'h80000000 <= addr_s) && (addr_s <= 32'h9FFFFFFF);

  assign decode_int[31] = (32'hA0000000 <= addr_s) && (addr_s <= 32'hBFFFFFFF);

  assign decode_int[32] = (32'hC0000000 <= addr_s) && (addr_s <= 32'hFFFFFFFF);



  // ---------------------------------------------------------------------------
  // remap decode

  assign remap_decode[0] = ~(aprot & security8[0]) & decode_int[0];

  assign remap_decode[1] = ~(aprot & security8[1]) & decode_int[1];

  assign remap_decode[2] = ~(aprot & security8[2]) & decode_int[26];

  assign remap_decode[3] = ~(aprot & security1) & decode_int[2];

  assign remap_decode[4] = ~(aprot & security5[0]) & decode_int[3];

  assign remap_decode[5] = ~(aprot & security5[2]) & decode_int[16];

  assign remap_decode[6] = ~(aprot & security5[1]) & decode_int[27];

  assign remap_decode[7] = ~(aprot & security5[1]) & decode_int[28];

  assign remap_decode[8] = ~(aprot & security6[1]) & decode_int[4];

  assign remap_decode[9] = ~(aprot & security6[0]) & decode_int[5];

  assign remap_decode[10] = ~(aprot & security6[2]) & decode_int[6];

  assign remap_decode[11] = ~(aprot & security6[7]) & decode_int[7];

  assign remap_decode[12] = ~(aprot & security6[8]) & decode_int[8];

  assign remap_decode[13] = ~(aprot & security6[5]) & decode_int[9];

  assign remap_decode[14] = ~(aprot & security6[6]) & decode_int[10];

  assign remap_decode[15] = ~(aprot & security6[3]) & decode_int[15];

  assign remap_decode[16] = ~(aprot & security6[4]) & decode_int[19];

  assign remap_decode[17] = ~(aprot & security6[9]) & decode_int[20];

  assign remap_decode[18] = ~(aprot & security7[6]) & decode_int[11];

  assign remap_decode[19] = ~(aprot & security7[7]) & decode_int[12];

  assign remap_decode[20] = ~(aprot & security7[8]) & decode_int[13];

  assign remap_decode[21] = ~(aprot & security7[9]) & decode_int[14];

  assign remap_decode[22] = ~(aprot & security7[2]) & decode_int[17];

  assign remap_decode[23] = ~(aprot & security7[3]) & decode_int[18];

  assign remap_decode[24] = ~(aprot & security7[4]) & decode_int[21];

  assign remap_decode[25] = ~(aprot & security7[5]) & decode_int[22];

  assign remap_decode[26] = ~(aprot & security7[1]) & decode_int[23];

  assign remap_decode[27] = ~(aprot & security7[10]) & decode_int[24];

  assign remap_decode[28] = ~(aprot & security7[0]) & decode_int[25];

  assign remap_decode[29] = ~(aprot & security0) & decode_int[29];

  assign remap_decode[30] = ~(aprot & security0) & decode_int[32];

  assign remap_decode[31] = ~(aprot & security3) & decode_int[30];

  assign remap_decode[32] = ~(aprot & security2) & decode_int[31];


  // ---------------------------------------------------------------------------
  // valid vect decode

  assign avalid_dec[0] = ((
remap_decode[3]));
  assign avalid_dec[1] = ((
remap_decode[8] || remap_decode[9] || remap_decode[10] || remap_decode[11] || remap_decode[12] || remap_decode[13] || remap_decode[14] || remap_decode[15] || remap_decode[16] || remap_decode[17]));
  assign avalid_dec[2] = ((
remap_decode[31]));
  assign avalid_dec[3] = ((
remap_decode[32]));
  assign avalid_dec[4] = ((
remap_decode[4] || remap_decode[5] || remap_decode[6] || remap_decode[7]));
  assign avalid_dec[5] = ((
remap_decode[0] || remap_decode[1] || remap_decode[2]));
  assign avalid_dec[6] = ((
remap_decode[29] || remap_decode[30]));
  assign avalid_dec[7] = ((
remap_decode[18] || remap_decode[19] || remap_decode[20] || remap_decode[21] || remap_decode[22] || remap_decode[23] || remap_decode[24] || remap_decode[25] || remap_decode[26] || remap_decode[27] || remap_decode[28]));
  assign avalid_int[8] = (~|avalid_int[7:0]);

  assign avalid_int[7:0] = avalid_dec;

  // ---------------------------------------------------------------------------
  // region decode

  assign region_int[0] = remap_decode[1] | remap_decode[6] | remap_decode[7]
                       | remap_decode[8] | remap_decode[11] | remap_decode[13]
                       | remap_decode[15] | remap_decode[17] | remap_decode[19]
                       | remap_decode[21] | remap_decode[23] | remap_decode[25]
                       | remap_decode[26];

  assign region_int[1] = remap_decode[2] | remap_decode[5] | remap_decode[10]
                       | remap_decode[11] | remap_decode[14] | remap_decode[15]
                       | remap_decode[18] | remap_decode[19] | remap_decode[22]
                       | remap_decode[23] | remap_decode[27];

  assign region_int[2] = remap_decode[11] | remap_decode[13] | remap_decode[14]
                       | remap_decode[16] | remap_decode[18] | remap_decode[19]
                       | remap_decode[24] | remap_decode[25];

  assign region_int[3] = remap_decode[12] | remap_decode[17] | remap_decode[20]
                       | remap_decode[21] | remap_decode[27];


  // ---------------------------------------------------------------------------
  // ACACHE mapping

  assign acache_out = acache_in;

  // ---------------------------------------------------------------------------
  // AREGION mapping

  assign aregion_out = region_int;


  //------------------------------------------------------------------------
  // OVL_ASSERT:
  //------------------------------------------------------------------------
// synopsys translate_off


// synopsys translate_on


endmodule

